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CV/Resume

Giacinto Paolo (GP) Saggese, PhD#

Cell: 408-431-1286 | Email | LinkedIn | GitHub

Summary#

Core Competencies#

  • Causal AI
  • Bayesian Modeling
  • ML Infrastructure
  • Time-Series Forecasting
  • Knowledge Graphs
  • Distributed Systems / High-performance Computing
  • Algo Trading / Quant Finance
  • Optimization
  • Technical Leadership

3x Startup Founder#

  • Causify.AI (2023–present) — Co-Founder & CTO

    • Building causal AI platform using Bayesian inference, knowledge graphs, and temporal ML
    • Raised $5.4M (Series seed)
    • Led $5M fundraising

  • June Inc. (2011–2015) — Co-Founder & CTO

    • Built quant trading infrastructure: stat-arb, market-neutral strategies
    • Raised $4M (Series A)
    • Led 8-person team
    • Acquired by private company

  • ZeroSoft Inc. (2007–2010) — Co-Founder & CTO

    • Created HPC simulation technology delivering 3–10x IC-verification speedup
    • Raised $2M (Series A)
    • Customers: NVIDIA, Intel, Cisco
    • Acquired by Synopsys for $24M

Selected Technical Highlights#

  • Built full-stack Causal AI platform (graph engine, Bayesian models, temporal ML, explainability)
  • Designed simulation technology delivering 3–10x IC-verification speedup
  • Developed alpha signal pipelines for large unstructured/alt-data
  • Delivered ML trading signals with stable out-of-sample performance
  • Deployed predictive signals across global markets
  • Created intraday simulators, portfolio optimizers, and low-latency research infrastructure
  • Built ML Ops workflows: data pipelines, feature stores, model validation, observability, CI/CD
  • Led ML/engineering teams (8–20 people) across startups and quant firms

Experience#

2023–present: Co-Founder & CTO, Causify.AI (USA)

  • Built a causal modeling platform using Bayesian inference, knowledge graphs, and temporal ML
  • Designed automated pipelines for model building, scoring, and deployment
  • Led technical vision, architecture, engineering, and early customer adoption
  • Supported $5M fundraising and product strategy to $1M ARR

2023–present: Adjunct Professor, University of Maryland (College Park, MD)

  • "DATA605: Big Data Systems" (300 students / year)
  • "MSML610: Advanced Machine Learning" (120 students / year)

2023–present: NSF I-Corps Instructor (College Park, USA)

2021–2022: Portfolio Manager, Engineers Gate (New York City)

  • Built ML signals for equities and futures (minute-level horizon)
  • Led 2-person research team; deployed models into production trading

2019–2020: CTO, Particle.One (San Jose, CA)

  • Built ML models generating predictive commodity signals
  • Raised $2.6M from Silicon Valley VCs
  • Managed 10-person distributed team; delivered first commercial signals

2015–2019: Head of Alt-Data Group, Teza Technologies (Berkeley, CA)

  • Developed ML/alt-data signals for futures, equities, FX, ETFs
  • Built distributed pipelines for large-scale feature engineering and model training
  • Led team of 12 researchers in Berkeley and Moscow

2011–2015: Co-Founder & CTO, June Inc. (Santa Clara, CA)

  • Designed quant strategies: stat-arb, market-neutral, long-short
  • Built research stack: Python/R workflows, intraday simulator, portfolio optimizer, custom ML
  • Wrote performance-critical C++ simulation components
  • Raised $4M (Series A/B); led 8-person team

2010–2011: Senior Member of Technical Staff, Synopsys (Mountain View, CA)

  • Integrated ZeroSoft's high-performance simulation engine into Synopsys tools

2007–2010: Co-Founder & VP Engineering, ZeroSoft Inc. (Milpitas, CA)

  • Created simulation tech enabling 3–10x faster IC verification
  • Built compiler and graph-algorithm pipeline in C++/Verilog
  • Raised $2M; customers included NVIDIA and Cisco
  • Led 11 engineers
  • 2 patents
  • Acquired by Synopsys for $24M

2005–2007: Senior Software Architect, NVIDIA (Santa Clara, CA)

  • Implemented C++ verification tools for Fermi GPU
  • Designed GPU blocks in Verilog and FPGA

2004–2005: Postdoc, University of Illinois (Urbana Champaign, IL)

  • Research on fault tolerance and soft errors

2000–2004: PhD, Electrical & Computer Engineering, University of Illinois (Urbana Champaign, IL)

  • 20+ publications in microarchitecture, cryptography, and fault tolerance

1995–2000: Master’s in Electrical Engineering, University of Naples (Italy)

  • GPA 3.99 / 4.00
  • Ranked 1st of 500+ students